1. Field of the Invention
Exemplary embodiments of the present general inventive concept relate to a memory controller and an operating method thereof.
A semiconductor memory device may be a memory device which is fabricated using semiconductors such as silicon (Si), germanium (Ge), gallium arsenide (GaAs), indium phosphide (InP), and the like. Semiconductor memory devices may be classified into volatile memory devices and nonvolatile memory devices.
2. Description of the Related Art
The volatile memory devices may lose stored contents at power-off. The volatile memory devices include a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), and the like. The nonvolatile memory devices may retain stored contents even at power-off. The nonvolatile memory devices may include a read only memory (ROM), a programmable ROM (PROM), an electrically programmable ROM (EPROM), an electrically erasable and programmable ROM (EEPROM), a flash memory device, a phase-change random access memory (PRAM), a magnetic random access memory (MRAM), a resistive random access memory (RRAM), a ferroelectric random access memory (FRAM), and the like. The flash memory device may be divided into a NOR type and a NAND type.
An increase in a storage capacity of a semiconductor memory device may be accomplished by improving the integrity of the semiconductor memory device and by programming multi-bit data in one memory cell. Improvement of the integrity of the semiconductor memory device may be accomplished by refining the processes of the semiconductor memory device. Programming of multi-bit data in one memory cell may be accomplished by reducing a distribution of a logic value stored in a memory cell. A memory cell storing multi-bit data may be called a multi-level cell (MLC).
The improved integrity and the introduction of MCL may cause an increase in an error rate. As the integrity is improved, data stored in a memory cell may be easily affected by noise. With an increase in an error rate, an error correcting function included in a memory controller may be expanded. This may cause an increase in power consumption.